With foundations laid over the last six decades, digital computing is evolving towards heterogeneous, domain-specific, and hardware-programmable architectures. For real-time systems (RTSs) today, this enables powerful, yet highly complex hardware platforms like systems on a chip (SoCs).
Besides reviving the aforementioned history and looking at future trends in two dedicated chapters, this book explores the intersection of RTSs and heterogeneous SoCs including a field-programmable gate array (FPGA), and tackles challenges in their interfacing, monitoring and optimization. Moving towards safety, security, predictability and energy efficiency, we present novel techniques for data acquisition in networked RTSs. We then propose independent measurement tools for end-to-end latencies and energy that are extended and fused into a unified tracing methodology also covering function. Lastly, we optimize energy in a latency-neutral way.
